1. Field of the Invention
The present invention relates to a semiconductor device manufacturing technology. More specifically, the present invention relates to a method for forming an intermetal dielectric layer between metal wirings using a low-k dielectric material, and a semiconductor device with the intermetal dielectric layer formed thereby.
2. Description of the Related Art
Following a higher integration and higher operational speed of a semiconductor device, metal wirings have been miniaturized more and more. However, the miniaturization of metal wirings can cause problems such as a resistance-capacitance delay (RC delay), deteriorating the operational speed of the semiconductor device.
Conventionally, copper (Cu) and aluminum (Al) have been developed as materials for metal wiring in Large Scale Integrated (LSI) circuits, because of their low electrical resistance and high tolerance to electromigration (EM). Especially, copper tends to be more widely used than aluminum, when the device has a critical dimension of 0.13 μm or less. However, it is not easy to etch a copper layer. Accordingly, a so-called damascene method has been generally used to form a copper wiring in semiconductor devices.
Meanwhile, because of a high manufacturing cost of the damascene method, using an aluminum wiring in the device of 0.13 μm or less has been increasing recently. However, an aluminum wire must have a sufficiently great height or thickness so as to provide a desired resistance. Accordingly, the aspect ratio of the gap formed between the aluminum wiring patterns may be increased, and thus, it becomes difficult to fill the gap between aluminum lines with a dielectric material.
In order to facilitate the gap filling with the dielectric material, decreasing the height or thickness of the aluminum wiring may increase the resistance-capacitance delay (RC delay) of the device. Furthermore, in order to compensate for the increase of the RC delay, a low-k dielectric material, having a lower dielectric constant than a conventional dielectric material such as a fluorinated silicate glass (FSG), can be used as an intermetal dielectric material. However, a low-k dielectric material generally has a problem in the manufacturing aspect. For example, it is difficult to form a via-hole inside a layer of a low-k dielectric material. Moreover, certain ingredients of certain low-k dielectric materials can be diffused into aluminum wiring patterns, thus causing defects such as a corrosion of the aluminum wiring.